INTEL P6

[george@cs.nps.navy.mil (Robert George)]

For those of you who were interested in the P6 (next generation Pentium),
here is an article from PowerPC News:

INTEL P6 WILL HAVE FOUR INTEGER UNITS
(January 6th 1995) Intel Corp's forthcoming 6m transistor P6 successor
to the Pentium is to have four integer execution units - 
arithmetic-logic units - compared with two in the Pentium. This will
require it to work rather like a chess program, looking many moves
ahead and speculatively executing many instructions. Using data flow
analysis, it will also look at the code coming into the processor and
analyse it to minimise data dependencies. It may also add some
instructions to the set in the Pentium. Initially to be clocked at
133MHz, the P6 will not be pin-compatible with the Pentium in its first
iteration. It is expected to have a 32kB first-level cache and a 256kB
or 512kB second-level cache integrated with the processor.
(C) Computergram International | Select 5000 for more information