Notes

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1	The Raw Architecture A Concrete Perspective Michael Bedford Taylor
2	Outline
3	The Raw Architecture
4	The Raw Tile
5	Raw’s four on-chip mesh networks
6	Raw’s I/O and Memory System
7	Outline
8	Raw compute processor ISA
9	Bit-oriented instructions
10	Branches & Divides
11	Bnea
12	Data Cache
13	More Instructions
14	Outline
15	Raw’s four on-chip networks
16	Raw’s Static Network
17	Raw’s Static Network
18	Between tile operand transport
19
20	Raw static router ISA
21
22	Raw’s Memory Network
23	Raw’s General Network
24	A Raw System in Action
25	Outline
26	Usage hint #1
27	Usage hint #2
28	Usage hint #3
29	Usage hint #4
30	Outline
31	Looking into the future
32	Exploration Avenues for External Users
33	Raw Prototype
34	Raw ASIC
35	Exploration Avenues for External Users
36	Exploration Avenues for External Users
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38	Exploration Avenues for External Users
39	Outline
40	Ultimate Guide: Raw Specification