Getting Started

The following documentation was followed by the MIT students who developed each benchmark.

Contents

• Administrivia
• Jacobi Example
• Your Benchmark
• Design Methodology

Administrivia

The benchmark suite is maintained under CVS (Concurrent Versions Systems). CVS Guide explains how to use CVS (as far as we are concerned). Basically, set the following environment variables:

• setenv CVSROOT /projects/raw/cvsroot

and make sure /usr/site/cvs is on your path. You will be checking out a local copy of the benchmark suite and working from within it. Later you will check you changes back in. So, change into a sandbox directory (or actually ~username should be fine). Then execute the command:

• cvs checkout benchmark

You will see that a new sub-directory "benchmark" is created. Work as normal in there developing your benchmark. Then go and read the CVS Guide when you are ready to release your work to the rest of us.

Jacobi Example

Look at the Jacobi example. Grok everything by browsing around. In your own checked-out version, try building various parts of the benchmark. Just execute "make" from the build directory and lots of thinks should start happening. If you get all the way to the Xilinx ppr runs, you can just type "quit" to stop them. A few other interesting make targets:

• check - simulate distributed behavioral and synthesized designs
• report - simulate distributed behavioral and synthesized designs
• run - load and run hardware version
• soft - compiles and executes software version
• sim - simulate behavioral verilog design
• sims - simulates synthesized design
• vectors -generates test version
• drivers - compiles driver programs
• ppr - runs Xilinx ppr
• compile - runs virtual wires compiler
• syn - synthesizes design with Synopsys
• bench - generates benchmark designs

Your Benchmark

For your new benchmark, the first thing to do is probably clone the Jacobi example. Don't use cp -r or tar, as you will mess up CVS.

I have already added a sub-directory under benchmark/suites for the design you are working on. Work from there. The only files you need from Jacobi to get started with are in benchmark/suites/jacobi/src:

• Makefile.in
• generate.c
• driver.c
• library.v

Copy these to your own src directory.

Design Methodology

You will need to develop a strategy for implementing your algorithm in hardware. Think about this for a while before you begin. You should then perform the following steps:

1. Design a hardware library of special-purpose computing elements.
2. Write a generator program, in C, that takes parameters as inputs and generates a top level behavioral verilog program that 1) instantiates all computing elements and 2) synthesizes the local communication.
3. Next, write a driver program, in C that is capable of driving either software, simulation, or hardware.
4. Run the software version of your benchmark using the driver program in software mode.
5. Create simulation test vectors using the driver program in simulation mode.
6. Simulate your un-mapped design using the Cadence verilog simulator.
7. Using Synopsys, synthesize your design for the VirtuaLogic emulator.
8. Simulate your synthesized design using the Cadence verilog simulator.
9. Compile your design to FPGAs with the virtual wires compiler.
10. Compile each FPGA with the Xilinx place and route tool. Note: this could potentially take a long, long, long, long, long, long time. You may want to use more than one workstation in parallel.
11. Download the resulting configuring onto the VirtuaLogic emulator.
12. Log into the VirtuaLogic host workstation, and run the hardware using your driver program in hardware mode.

All of these steps are automated once your generate, driver, and library sources are developed. See benchmark/include/raw.make for more details. Good luck!

Flames to me,

jbabb@mit.edu