David Shoemaker, An Optimized Hardware Architecture and Communication
Protocol for Scheduled Communication, Ph.D. thesis, May 1997.
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Abstract:
Managing communications in parallel processing systems has proven to be one of the most critical problems facing designers. As processor speeds continue to increase, communication latency and bandwidth become more of a bottleneck. Traditional network routers receive messages that are examined and forwarded by a local router. Performance is lost both by the time spent examining a message in order to determine its destination, and by the inability of a processor's router to have a global sense of message traffic.
The NuMesh system defines a high-speed communication substrate optimized for off-line routing. The goal of the project is to explore a new approach to the construction of modular, high-performance digital systems in which the components plug together in a nearest-neighbor three-dimensional mesh. Each component module contains a specialized programmable communications controller that routes message traffic among neighboring modules according to a precompiled pattern. The NuMesh project reserves bandwidth for possible message transfers at compile time. By setting fixed periods in which processors can communicate with each other, no message data need be examined and a compile-time analysis of message traffic can minimize network congestion.
This research will examine the hardware and communication protocols needed to take advantage of scheduled communication, as well as the mechanisms needed to support those cases in which the communication can not be specified at compile-time. In addition, flow-controlled transfers are supported to allow the processors attached to the network to inject or remove messages at undetermined times. A novel architecture is presented that utilizes these ideas. A network chip is implemented that can be connected to a variety of off-the-shelf processors, providing a substrate for a heterogeneous parallel processing system.