We have finished selecting papers, and have a very exciting program including two completed research microprocessor prototypes, and several papers on FPGA prototyping and emulation technology.
This half-day workshop is intended as a forum for the builders in our community to share their practical on-the-ground experiences, to provide a status update on their progress, and to convey insights for those considering prototyping or emulating their ideas. The organizers decided to merge the Workshop on Architectural Research using FPGA Platforms (WARFP) with WARP, as these two communities are closely related.
Talks that address the following subjects are encouraged:
Contributions are encouraged from all members of the architecture community, including those considering embarking on a prototyping or emulation effort. The organizers of the workshop will be in contact with the submission authors to follow up on what sort of content they would be interested in presenting. Our goal is to have a lively forum with plenty of scope for participant interaction.
Previous workshop websites:
Participants are invited to submit a PDF extended abstract of up to two pages (no denser than double column, 10 point, single-spaced). You may include an appendix of any length but we will not promise to read it. The purpose of this appendix is to include things such as pictures of your prototype, tables, figures, or other items that help clarify the two page abstract. Demonstration proposals are welcome either standalone or in conjunction with a talk abstract, and should be a maximum of two pages. Submissions exceeding guideline lengths will be summarily rejected. Extensions of the deadline will not be granted. Early submissions will be happily accepted.