Workshop on Architecture Research using FPGA Platforms, 2005

At HPCA-11, Palace Hotel, San Francisco
Sunday February 13, 2005

Workshop Organizers:
Arvind, MIT
Krste Asanovic, MIT
Derek Chiou, UT Austin
James Hoe, CMU
Christoforos Kozyrakis, Stanford
Shih-Lien Lu, Intel

Program with links to Abstracts and Slides

*** Instructions for Presenters ***

Thanks to all of the authors for the large number of interesting submissions received. We have added a poster submission to accomodate papers we couldn't fit into the few presentation slots. We look forward to a stimulating discussion at the workshop.

Workshop Description

FPGAs have advanced to the point where complex microprocessors can be mapped to a single part. This provides an exciting new model for architecture research, where architectural ideas can be prototyped in great detail yet with sufficient performance to support realistic evaluation on long running applications. This workshop has the goal of advancing the field by providing a forum to share ideas and promote discussion of how to best share research infrastructure. The focus is on using FPGAs to aid in architecture research, not in the well-established areas of using FPGAs for reconfigurable computing and custom computing machines.

Call for Participation

The format of the workshop is intended to be highly interactive. Participants are invited to submit a one-page abstract if they'd like to make a 10-15 minute presentation at the start of the workshop. Over half of the workshop will be reserved for interactive discussion after the presentations.

Topics of interest include:

Submission Details