Benchmark | Description | lines of code | # of constructs in the program | Number of filters in the expanded graph | |||
---|---|---|---|---|---|---|---|
filters | pipelines | splitjoins | feedbackloops | ||||
Radar | Radar array front-end | 549 | 8 | 3 | 6 | 0 | 52 |
Benchmark | 250 MHz RAW processor | C on a 2.2 GHz Intel Pentium IV | ||||
---|---|---|---|---|---|---|
StreamIt on 16 tiles | C on a single tile | |||||
Utilization | # of tiles used | MFLOPS | Throughput (per 105 cycles) | Throughput (per 105 cycles) | Throughput (per 105 cycles) | |
Radar | 79% | 16 | 1,231 | 0.52 | app. too large | 0.041 |
flops reported by RAW's cycle-accurate simulator are 968604, which is (956322 flops/194115 cycles) * 250 million cylces/second = 1231.643 MFLOPS.
The first output was done at time step 0x2b81a (178202 cycles).
The second output was done at 0x5ae5d (372317 cycles) (delta=194115)
The third output done at 0x8a58f (566671 cycles) (delta=194354)
Based on these cycle counts, each output takes 194115 min/194354 max
cycles (average of 194235).
1 output every 194115 cycles, normalized to 10^5 cycles results in a throughput of 1*(100000/194115) = 0.52 outputs every 10^5 cycles.
Number of cycles per iteration: 10^5 iterations/ 110.45 second * 1 outputs / 1 iteration * 1 second / 2.2*10^9 cycles * 10^5 cycles = 0.04115 outputs / 10^5 cycles.